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Cypress CY4623 PS2鼠標(biāo)參考設(shè)計方案
摘要: Cypress公司的CY4623PS2鼠標(biāo)參考設(shè)計采用CY7C638xxenCoReII系列產(chǎn)品.enCoReII是集成了低速USB接口的8位閃存可編程微控制器,指令集特別是USB和PS2操作.enCoReII具有多達20個GPIO,支持USB,PS/2和其它的應(yīng)用.USB或PS2鼠標(biāo)參考設(shè)計是成本效益節(jié)省空間的解決方案,具有USB,PS/2和WHQL標(biāo)準(zhǔn)的所有功能.本文介紹了enCoReII系列產(chǎn)品主要特性,方框圖,以及CY4623鼠標(biāo)參考設(shè)計主要特性,方框圖,電路圖和材料清單.
關(guān)鍵詞: 接口IC Cypress CY4623 PS2
Abstract:
Key words :

Cypress 公司的CY4623 PS2鼠標(biāo)參考設(shè)計采用CY7C638xx enCoRe II系列產(chǎn)品. enCoRe II是集成了低速USB接口的8位閃存可編程微控制器,指令集特別是USB和PS2操作. enCoRe II具有多達20個GPIO,支持USB,PS/2和其它的應(yīng)用.USB或PS2鼠標(biāo)參考設(shè)計是成本效益節(jié)省空間的解決方案,具有USB,PS/2和WHQL標(biāo)準(zhǔn)的所有功能.本文介紹了enCoRe II系列產(chǎn)品主要特性,方框圖,以及CY4623鼠標(biāo)參考設(shè)計主要特性,方框圖,電路圖和材料清單.

Cypress has reinvented its leadership position in the low speed USB market with a new family of innovative microcontrollers. Introducing enCoRe II USB -‘enhanced Component Reduction.’Cypress has leveraged its design expertise in USB solutions to advance its family of low speed USB microcontrollers, which enable peripheral developers to design new products with a minimum number of components. The enCoRe II USB technology builds on the enCoRe family. The enCoRe family has an integrated oscillator that eliminates the external crystal or resonator, reducing overall cost. Also integrated into this chip are other external components commonly found in low speed USB applications, such as pull-up resistors, wakeup circuitry, and a 3.3V regulator. Integrating these components reduces the overall system cost.

The enCoRe II is an 8-bit flash programmable microcontroller with an integrated low speed USB interface. The instruction set is optimized specifically for USB and PS/2 operations, although the microcontrollers may be used for a variety of other embedded applications.

The enCoRe II features up to 20 GPIO pins to support USB, PS/2, and other applications. The IO pins are grouped into four ports (Port 0 to 3). The pins on Port 0 and Port 1 may each be configured individually while the pins on Ports 2 and 3 are configured only as a group. Each GPIO port supports high impedance inputs, configurable pull-up, open drain output, CMOS/TTL inputs, and CMOS output with up to five pins that support a programmable drive strength of up to 50 mA sink current. GPIO Port 1 features four pins that interface at a voltage level of 3.3V. Additionally, each IO pin may be used to generate a GPIO interrupt to the microcontroller. Each GPIO port has its own GPIO interrupt vector; in addition, GPIO Port 0 has three dedicated pins that have independent interrupt vectors (P0.2 - P0.4).

The enCoRe II features an internal oscillator. With the presence of USB traffic, the internal oscillator may be set to precisely tune to USB timing requirements (24 MHz ±1.5%). Optionally, an external 12 MHz or 24 MHz clock is used to provide a higher precision reference for USB operation. The clock generator provides the 12 MHz and 24 MHz clocks that remain internal to the microcontroller. The enCoRe II also has a 12-bit program­mable interval timer and a 16-bit Free Running Timer with Capture Timer registers. In addition, the enCoRe II includes a Watchdog timer and a vectored interrupt controller.

The enCoRe II has up to eight Kbytes of flash for user code and up to 256 bytes of RAM for stack space and user variables.

The power on reset circuit detects logic when power is applied to the device, resets the logic to a known state, and begins executing instructions at flash address 0x0000. When power falls below a programmable trip voltage, it generates a reset or may be configured to generate an interrupt. There is a low voltage detect circuit that detects when VCC drops below a programmable trip voltage. It is configurable to generate an LVD interrupt to inform the processor about the low voltage event. POR and LVD share the same interrupt. There is no separate interrupt for each. The Watchdog timer may be used to ensure the firmware never gets stalled in an infinite loop.

The microcontroller supports 22 maskable interrupts in the vectored interrupt controller. Interrupt sources include a USB bus reset, LVR/POR, a programmable interval timer, a 1.024 ms output from the free-running timer, three USB endpoints, two capture timers, four GPIO Ports, three Port 0 pins, two SPI, a 16-bit free running timer wrap, an internal sleep timer, and a bus active interrupt. The sleep timer causes periodic interrupts when enabled. The USB endpoints interrupt after a USB transaction complete is on the bus. The capture timers interrupt when a new timer value is saved because of a selected GPIO edge event. A total of seven GPIO interrupts support both TTL or CMOS thresholds. For additional flexibility on the edge sensitive GPIO pins, the interrupt polarity is programmed as rising or falling.

The free-running 16-bit timer provides two interrupt sources: the 1.024 ms outputs and the free running counter wrap interrupt. The programmable interval timer provides up to 1? sec resolution and provides an interrupt every time it expires. These timers are used to measure the duration of an event under firmware control by reading the desired timer at the start and at the end of an event, then calculating the difference between the two values. The two 8-bit capture timer registers save a programmable 8-bit range of the free-running timer when a GPIO edge occurs on the two capture pins (P0.5, P0.6). The two 8-bit captures may be ganged into a single 16-bit capture.

The enCoRe II includes an integrated USB serial interface engine (SIE) that allows the chip to easily interface to a USB host. The hardware supports one USB device address with three endpoints.

The USB D+ and D– pins are optionally used as PS/2 SCLK and SDATA signals so that products are designed to respond to either USB or PS/2 modes of operation. The PS/2 operation is supported with internal 5 K? pull-up resistors on P1.0 (D+) and P1.1 (D–), and an interrupt to signal the start of PS/2 activity. In USB mode, the integrated 1.5 K??pull-up resistor on D– may be controlled under firmware. No external components are necessary for dual USB and PS/2 systems, and no GPIO pins need to be dedicated to switching between modes.

The enCoRe II supports in system programming by using the D+ and D– pins as the serial programming mode interface. The programming protocol is not USB.

CY7C638xx主要特性:

■USB 2.0-USB-IF certified (TID # 40000085)

■enCoRe™ II USB - ‘enhanced Component Reduction’

?Crystalless oscillator with support for an external clock. The internal oscillator eliminates the need for an external crystal or resonator.

?Two internal 3.3 V regulators and an internal USB Pull-up resistor

?Configurable I/O for real world interface without external components

■USB Specification compliance

?Conforms to USB Specification, Version 2.0

?Conforms to USB HID Specification, Version 1.1

?Supports one low speed USB device address

?Supports one control endpoint and two data endpoints

?Integrated USB transceiver with dedicated 3.3 V regulator for USB signalling and D– pull-up.

■Enhanced 8-bit microcontroller

?Harvard architecture

?M8C CPU speed is up to 24 MHz or sourced by an external clock signal

■Internal memory

?Up to 256 bytes of RAM

?Up to eight Kbytes of flash including EEROM emulation

■Interface can auto configure to operate as PS/2 or USB

?No external components for switching between PS/2 and USB modes

?No General Purpose I/O (GPIO) pins required to manage dual mode capability

■Low power consumption

?Typically 10 mA at 6 MHz

?10 uA sleep

■In system reprogrammability:

?Allows easy firmware update

■GPIO ports

?Up to 20 GPIO pins

?2 mA source current on all GPIO pins. Configurable 8 or 50 mA/pin current sink on designated pins.

?Each GPIO port supports high impedance inputs, configurable pull-up, open drain output, CMOS/TTL inputs, and CMOS output

?Maskable interrupts on all I/O pins

■A dedicated 3.3 V regulator for the USB PHY. Aids in signalling and D– line pull-up

■125 mA 3.3 V voltage regulator powers external 3.3 V devices

■3.3 V I/O pins

?4 IO pins with 3.3 V logic levels

?Each 3.3 V pin supports high impedance input, internal pull-up, open drain output or traditional CMOS output

■SPI serial communication

?Master or slave operation

?Configurable up to 4 Mbit/second transfers in the master mode

?Supports half duplex single data line mode for optical sensors

■2-channel 8-bit or 1-channel 16-bit capture timer registers. Capture timer registers store both rising and falling edge times.

?Two registers each for two input pins

?Separate registers for rising and falling edge capture

?Simplifies the interface to RF inputs for wireless applications

■Internal low power wakeup timer during suspend mode:

?Periodic wakeup with no external components

■12-bit Programmable Interval Timer with interrupts

■Advanced development tools based on Cypress PSoC® tools

■Watchdog timer (WDT)

■Low-voltage detection with user configurable threshold voltages

■Operating voltage from 4.0 V to 5.5 V DC

■Operating temperature from 0–70 ℃

■Available in 16 and 18-pin PDIP; 16, 18, and 24-pin SOIC; 24-pin QSOP, and 32-pin QFN packages

■Industry standard programmer support 0.1 Applications The CY7C63310/CY7C638xx is targeted for the following applications:

■PC HID devices

?Mice (optomechanical, optical, trackball)

■Gaming

?Joysticks

?Game pad

■General purpose

?Barcode scanners

?POS terminal

?Consumer electronics

?Toys

?Remote controls

?Security dongles

圖1.CY7C638xx方框圖

USB或PS2鼠標(biāo)參考設(shè)計

Cypress offers a complete design for a USB or PS2 mouse in a cost effective, space-saving solution. This reference design is a fully functional product that complies with all applicable USB, PS/2, and WHQL specifications.

Our Optical Mouse Reference Design is based on the Cypress enCoRe II - enhanced Component Reduction – device family. This revolutionary family integrates numerous common components, including our breakthrough crystal-less oscillator, 3.3V regulator with external supply, D- pull-up resistor, and flash memory. The result is an overall reduction in board components and a reduced system cost.

This design utilizes a single cable capable of being connected via a USB connector or PS/2 connector with an adapter. Firmware can be built to demonstrate USB or PS/2 operation, and the chip will support a complete combi USB-PS/2 implementation. The flash based microcontroller allows easy firmware modification, as well as storage of Vendor and Product IDs without an external EEPROM. The flash can be re-programmed directly through the USB cable, making it possible to update firmware in manufacturing or in the field without even opening the plastics!

USB或PS2鼠標(biāo)參考設(shè)計主要特性:

? Agilent ADNS-2620 optical sensor

• USB or PS/2 support

? May be customized for full combi support

• No external transistors or pull-ups

• 3 buttons with I/O for 6-10 more

• CY7C638xx device family

? Capable of interface auto detection

? Internal crystal-less oscillator

? Proprietary 8-bit RISC processor, optimized for USB and PS/2

? Up to 8KB of internal flash

• USB 2.0 specification compliant

• WHQL compliant

圖2.USB或PS2鼠標(biāo)參考設(shè)計外形圖

圖3.USB或PS2鼠標(biāo)參考設(shè)計方框圖

圖4.USB或PS2鼠標(biāo)參考設(shè)計電路圖
USB或PS2鼠標(biāo)參考設(shè)計材料清單(BOM):

詳情請見:
http://www.cypress.com/?docID=24699
以及
http://www.cypress.com/?docID=26226

http://www.cypress.com/?docID=26225

 



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