中圖分類號： TN713 文獻(xiàn)標(biāo)識碼： A DOI：10.16157/j.issn.0258-7998.191059 中文引用格式： 宋連慶,，萬卓,，韋新磊,，等. 基于DSP-FPGA的APF的硬件設(shè)計[J].電子技術(shù)應(yīng)用,，2020，46(5)：74-78. 英文引用格式： Song Lianqing,，Wan Zhuo,，Wei Xinlei，et al. Hardware design of APF based on DSP-FPGA[J]. Application of Electronic Technique,，2020,，46(5)：74-78.
Hardware design of APF based on DSP-FPGA
Song Lianqing，Wan Zhuo,，Wei Xinlei,，Quan Ce，Ma Cunle
Abstract： APF based on NPC three-level topology structure can effectively improve the voltage withstand capacity of the switch. Firstly, through MATLAB simulation, it is concluded that three-level APF active filter has relatively good compensation characteristics in terms of harmonic current compensation.According to the conclusion of the simulation, based on the main control prototype of dual-core DSP28377D and EP3C40Q240C8N, after the design of the protection circuit, the hardware circuit of APF active filter is tested by sampling, drive test, DC side charge test and inverter side test with pure resistance inductance load.The test of hardware circuit shows that APF active filter design based on DSP-FPGA can satisfy the condition of harmonic current compensation.
Key words : three level topology,；MATLAB,；active filter；harmonic current compensation
