中圖分類號(hào)： TN722 文獻(xiàn)標(biāo)識(shí)碼： A DOI：10.16157/j.issn.0258-7998.201136 中文引用格式： 張芳玲，雷倩倩,，張旭東,，等. 基于負(fù)反饋技術(shù)的嵌套式直流失調(diào)消除電路[J].電子技術(shù)應(yīng)用，2021,，47(5)：50-53,，58. 英文引用格式： Zhang Fangling，Lei Qianqian,，Zhang Xudong,，et al. A nested DC offset cancellation circuit based on negative feedback technique[J]. Application of Electronic Technique，2021,，47(5)：50-53,，58.
A nested DC offset cancellation circuit based on negative feedback technique
Abstract： Based on the UMC 40 nm CMOS process, a programmable gain amplifier(PGA) with DC offset cancellation circuit(DCOC) is designed. The PGA adopts a closed-loop resistance negative feedback structure and consists of a cascade of two gain units. DCOC circuit is based on the traditional DC negative feedback structure, a nested feedback method is proposed to reduce the power consumption and area of DCOC circuit. The simulation results show that within the gain variation control range of 0～52 dB, the high pass cutoff frequency and the relative inhibition degree of DCOC are constant at 10 kHz and 50 dB,and the maximum correctable input misalignment at 0 dB is 110 mV. Compared with the traditional design method, the area of DCOC has been reduced by almost half.
Key words : DC offset cancellation,；nested feedback；programmable gain amplifier
0 引言
隨著可編程增益放大器(Programmable Gain Amplifier,，PGA)放大倍數(shù)的增大,，尤其在給接收鏈路提供較大增益時(shí)[1-3]，直流失調(diào)的問題就越來越嚴(yán)重,，使得下一級(jí)電路處于飽和狀態(tài),。因此，必須使用直流失調(diào)消除電路來解決這一問題,。常見的直流失調(diào)消除技術(shù)有四種,，一是交流耦合法[4-5]，為了得到低的高通截止頻率,，需要很大的電阻電容,，占用面積大，不易集成,；二是數(shù)字消除技術(shù)[6-8]具有極低的高通截止頻率,，分辨率低，需要額外的量化器和數(shù)模轉(zhuǎn)換器,，電路實(shí)現(xiàn)較復(fù)雜,；三是前饋消除技術(shù)[9-10]，由于器件的不匹配等因素,，兩路的增益不完全相同且這種方法功耗較大,；四是直流負(fù)反饋消除方法[11-15]，這種方法解決了交流耦合所需要的大電容和數(shù)字消除電路的復(fù)雜性以及前饋消除方法存在的問題,。直流負(fù)反饋消除技術(shù)如圖1所示,，電阻R、電容C和放大器B組成反饋通路,，將輸出端out檢測(cè)到的直流失調(diào)信號(hào)轉(zhuǎn)換成電壓或電流反饋到輸入端in,，從而消除直流失調(diào)。
