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基于AXI總線的可配置LVDS控制器設(shè)計(jì)與驗(yàn)證
2021年電子技術(shù)應(yīng)用第6期
蒙宇霆,,袁海英,,丁 冬
北京工業(yè)大學(xué) 信息學(xué)部微電子學(xué)院,,北京100124
摘要: 針對(duì)不同應(yīng)用場(chǎng)景下LVDS通信協(xié)議體現(xiàn)在數(shù)據(jù)位寬、幀格式和存儲(chǔ)方式的選擇差異性和數(shù)據(jù)收發(fā)靈活性,,提出一種基于AXI總線的可配置LVDS控制器設(shè)計(jì)與驗(yàn)證方案,。為了實(shí)現(xiàn)對(duì)LVDS控制器的精確控制,增加基于APB接口的可配置寄存器模塊,,在SoC系統(tǒng)上由軟件控制數(shù)據(jù)傳輸,,有效提高了數(shù)據(jù)收發(fā)的靈活性;為了提高傳輸效率并廣泛適應(yīng)場(chǎng)景需求,,將與內(nèi)存交互的接口定義為AXI協(xié)議接口,;為了避免傳輸數(shù)據(jù)錯(cuò)誤和數(shù)據(jù)包丟失等現(xiàn)象,在自定義協(xié)議中加入奇偶校驗(yàn)功能并在電路中加入數(shù)據(jù)包檢查機(jī)制,。隨后,,采用高效的回環(huán)驗(yàn)證方案針對(duì)LVDS控制器進(jìn)行功能測(cè)試。實(shí)驗(yàn)結(jié)果表明該LVDS控制器基于AXI接口準(zhǔn)確高效地實(shí)現(xiàn)了對(duì)端設(shè)備之間的數(shù)據(jù)收發(fā)功能,,這種可配置的數(shù)據(jù)傳輸電路設(shè)計(jì)和驗(yàn)證方案靈活可行,,便于廣泛應(yīng)用到視頻圖像數(shù)據(jù)傳輸系統(tǒng)中,。
中圖分類號(hào): TN919.3
文獻(xiàn)標(biāo)識(shí)碼: A
DOI:10.16157/j.issn.0258-7998.201211
中文引用格式: 蒙宇霆,袁海英,,丁冬. 基于AXI總線的可配置LVDS控制器設(shè)計(jì)與驗(yàn)證[J].電子技術(shù)應(yīng)用,2021,,47(6):40-45,,56.
英文引用格式: Meng Yuting,Yuan Haiying,,Ding Dong. Design and verification of a configurable LVDS controller based on AXI bus[J]. Application of Electronic Technique,,2021,47(6):40-45,,56.
Design and verification of a configurable LVDS controller based on AXI bus
Meng Yuting,,Yuan Haiying,Ding Dong
School of Microelectronics,,F(xiàn)aculty of Information Technology,,Beijing University of Technology,Beijing 100124,,China
Abstract: In view of the differences of data bit width, frame format and storage mode and flexibility of data transmission in different application scenarios,,a configurable LVDS controller based on AXI bus was proposed. In order to achieve precise control of LVDS controller, a configurable register module based on APB interface was added, and data transmission was controlled by software on the SoC system, which effectively improved the flexibility of data transmission and reception. In order to improve the transmission efficiency and widely adapt to the scenario requirements, the interface that interacts with the memory is defined as the interface of the AXI protocol. In order to avoid data transmission errors and packet loss, a parity function was added to the custom protocol and the packet checking mechanism was added to the circuit. Then, an efficient loopback verification scheme was used to perform functional tests on the LVDS controller. The experimental results show that the LVDS controller based on AXI interface can accurately and efficiently realize the data transmission and reception function between the peer devices. This configurable data transmission circuit design and verification scheme is flexible and feasible, so that it can be widely used in video image data transmission.
Key words : AXI bus;LVDS controller,;high-speed interface,;configurable module;data transceiver

0 引言

    復(fù)雜電子系統(tǒng)設(shè)計(jì)對(duì)數(shù)據(jù)傳輸速率的要求日益嚴(yán)格,,也帶來高功耗,、高成本等問題,低壓差分信號(hào)(LVDS)[1]是一種高性能數(shù)據(jù)傳輸技術(shù),,它是速度,、成本和功耗之間的最佳折中方案。在物理層電路設(shè)計(jì)方面,,LVDS的低壓擺幅(250 mV~450 mV)和快速過渡時(shí)間可以使數(shù)據(jù)傳輸速率達(dá)到100 Mb/s~3 Gb/s,,能夠滿足現(xiàn)代復(fù)雜系統(tǒng)設(shè)計(jì)中對(duì)數(shù)據(jù)傳輸?shù)男枨蟆4送?,這種低壓擺幅可以降低功耗消散,,具備差分遠(yuǎn)距離傳輸[2]的優(yōu)點(diǎn)。在當(dāng)今大量數(shù)據(jù)傳輸?shù)闹T多場(chǎng)景中,,如芯片間的信息傳輸[3-4],、視頻圖像處理[5-6]、光通信[7]和LCD面板[8]等,,LVDS已成為最有前景的解決方案之一,。在數(shù)字邏輯功能設(shè)計(jì)方面,,由于需求、協(xié)議和應(yīng)用場(chǎng)景的差異[9-10],,設(shè)計(jì)人員存在大量重復(fù)性的設(shè)計(jì),、調(diào)試工作。為提高系統(tǒng)開發(fā)效率,,解決平臺(tái)間的兼容性問題,,通常在FPGA平臺(tái)上實(shí)現(xiàn)LVDS高速接口設(shè)計(jì)[11-13],文獻(xiàn)[11]在FPGA上實(shí)現(xiàn)了LVDS總線控制器,,解決了多節(jié)點(diǎn)高速通信的故障隔離問題,;文獻(xiàn)[12]實(shí)現(xiàn)了LVDS接口的收發(fā)單元設(shè)計(jì),在收發(fā)通路中加入數(shù)據(jù)與時(shí)鐘對(duì)齊機(jī)制,,提高了平臺(tái)兼容性,,并在FPGA上驗(yàn)證了方案。文獻(xiàn)[14]通過FPGA設(shè)計(jì)了一種基于LVDS接口的高速并行數(shù)據(jù)傳輸系統(tǒng),,并應(yīng)用于實(shí)際專用網(wǎng)絡(luò)交換模塊,。在實(shí)際芯片工程中,考慮到當(dāng)LVDS控制器集成到SoC系統(tǒng)上時(shí)存在兼容性問題,,軟硬件間應(yīng)有更高的操作靈活度,,系統(tǒng)各模塊間數(shù)據(jù)傳輸應(yīng)高速穩(wěn)定。因此,,為了提高系統(tǒng)可靠性,,降低成本,設(shè)計(jì)一種高靈活度,、高性能的LVDS控制器具有很高的價(jià)值,。




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作者信息:

蒙宇霆,,袁海英,,丁  冬

(北京工業(yè)大學(xué) 信息學(xué)部微電子學(xué)院,北京100124)




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