中圖分類號： TP368.1
文獻標識碼： A
DOI：10.16157/j.issn.0258-7998.222635
中文引用格式： 張文文,，唐映強. 一種基于MCU芯片的FPGA原型驗證平臺設(shè)計[J].電子技術(shù)應(yīng)用,，2022，48(9)：59-62.
英文引用格式： Zhang Wenwen,，Tang Yingqiang. A FPGA prototype verification platform design based on MCU chip[J]. Application of Electronic Technique,，2022,，48(9)：59-62.

A FPGA prototype verification platform design based on MCU chip

Abstract： In order to shorten the development cycle of Microcontroller Unit(MCU) chip,this paper proposes a Field Programmable Gate Array(FPGA) prototype verification platform design based on MCU chip.The design is to change the FPGA Random Access Memory(RAM) IP replace program storage unit used in the traditional FPGA prototype verification process into the FPGA dual port RAM IP. One port is controlled according to the traditional method,and the other port control signal is connected to the special control logic for independent control without affecting the function of the original MCU.The method not only saves the times of multiple FPGA synthesis,but also can monitor RAM in real time,which is convenient for error detection.At the same time,this method is universal and can be transplanted to FPGA prototype verification based on similar System on Chip(SoC) architecture.

Key words : MCU chip,；FPGA prototype,；verification platform；dual port RAM,；reusable