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基于AXI總線復(fù)用的DMA數(shù)據(jù)傳輸結(jié)構(gòu)設(shè)計(jì)
2023年電子技術(shù)應(yīng)用第8期
阮翔,任濤,,毛佳佳,,張虎
(中國電子科技集團(tuán)公司第52研究所,浙江 杭州 311100)
摘要: 常規(guī)多通道DMA數(shù)據(jù)傳輸結(jié)構(gòu)應(yīng)用在多傳感器接入式人工智能平臺時(shí),,隨著傳感器類型和數(shù)量的增加,,在通道協(xié)議轉(zhuǎn)換、AXI總線擴(kuò)展過程中會消耗大量的FPGA邏輯和存儲資源,,容易產(chǎn)生邏輯擁塞,,增加工具布線難度。與此同時(shí),,封閉式的AXI系統(tǒng)缺乏對通道差異控制的靈活性,,難以適應(yīng)人工智能平臺多模式數(shù)據(jù)傳輸需求。因此,,設(shè)計(jì)了一種AXI總線復(fù)用方式的DMA數(shù)據(jù)傳輸結(jié)構(gòu),,該設(shè)計(jì)可以極大地縮減AXI總線數(shù)量,降低FPGA資源消耗和工具布線用時(shí),,方便地引入附加邏輯實(shí)現(xiàn)多模式DMA數(shù)據(jù)傳輸,,為人工智能平臺提供靈活高效的多源數(shù)據(jù)獲取機(jī)制。
關(guān)鍵詞: 通道 DMA 傳輸 AXI FPGA
中圖分類號:TP274 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.223646
中文引用格式: 阮翔,,任濤,,毛佳佳,等. 基于AXI總線復(fù)用的DMA數(shù)據(jù)傳輸結(jié)構(gòu)設(shè)計(jì)[J]. 電子技術(shù)應(yīng)用,2023,,49(8):125-129.
英文引用格式: Ruan Xiang,,Ren Tao,Mao Jiajia,,et al. Design of DMA data transmission structure based on AXI bus multiplexing[J]. Application of Electronic Technique,,2023,49(8):125-129.
Design of DMA data transmission structure based on AXI bus multiplexing
Ruan Xiang,,Ren Tao,,Mao Jiajia,Zhang Hu
(The 52th Research Institute of China Electronics Technology Group Corporation,, Hangzhou 311100,, China)
Abstract: When the conventional multi-channel DMA data transmission structure is applied to the multi-sensor connected artificial intelligence platform, with the increase of sensor type and quantity, a lot of FPGA logic and storage resources will be consumed in the process of channel protocol conversion and AXI bus extension, which will easily lead to logic congestion and increase the difficulty of tool routing. At the same time, the closed AXI system lacks the flexibility of channel differential control, and it is difficult to adapt to the multi-mode data transmission requirements of artificial intelligence platform. Therefore, a DMA data transmission structure with AXI bus multiplexing mode is designed, which can greatly reduce the number of AXI buses, reduce FPGA resource consumption and tool routing time, conveniently fit additional logic to realize multi-mode DMA data transmission, and provide a flexible and efficient multi-source data acquisition mechanism for artificial intelligence platform.
Key words : channel;DMA,;transmission,;AXI;FPGA

0 引言

近年來,,支持多傳感器接入的人工智能平臺已經(jīng)在各個(gè)領(lǐng)域獲得廣泛應(yīng)用,。利用嵌入式人工智能(Artificial Intelligence,,AI)處理器和現(xiàn)場可編程邏輯門陣列(Field Programmable Gate Array,,FPGA)進(jìn)行直接內(nèi)存訪問(Direct Memory Access,DMA)交互的系統(tǒng)架構(gòu)往往成為這類人工智能平臺的最優(yōu)實(shí)現(xiàn)方案,。平臺內(nèi),,F(xiàn)PGA承擔(dān)了數(shù)據(jù)的采集、緩存及DMA任務(wù),。常規(guī)方式是把每個(gè)數(shù)據(jù)通道封裝成一路AXI總線,,使用AXI交換結(jié)構(gòu)將數(shù)據(jù)通道與緩存控制器、DMA控制器互聯(lián),,形成一個(gè)封閉的AXI數(shù)據(jù)傳輸系統(tǒng),。然而,隨著應(yīng)用場景復(fù)雜度和平臺智能化程度的提升,,傳感器的種類和數(shù)量持續(xù)增長,。常規(guī)傳輸結(jié)構(gòu)逐漸表現(xiàn)出擴(kuò)展不便、優(yōu)化困難,、靈活性差等問題,。為簡化AXI交換拓?fù)洹⒎奖阃ǖ罃U(kuò)展,、實(shí)現(xiàn)靈活的DMA參數(shù)化配置,,本文設(shè)計(jì)了一種以AXI總線復(fù)用方式實(shí)現(xiàn)的DMA數(shù)據(jù)傳輸結(jié)構(gòu),以滿足平臺對多路、多類型傳感器通道擴(kuò)展和數(shù)據(jù)靈活處理的需求,。



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作者信息:

阮翔,,任濤,毛佳佳,,張虎

(中國電子科技集團(tuán)公司第52研究所,,浙江 杭州 311100)

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