《電子技術(shù)應(yīng)用》
您所在的位置:首頁 > 通信與網(wǎng)絡(luò) > 設(shè)計應(yīng)用 > 高速以太網(wǎng)均衡技術(shù)的綜述與思考
高速以太網(wǎng)均衡技術(shù)的綜述與思考
電子技術(shù)應(yīng)用
萬國偉1,,康凱1,,蔣海平2
1.中國科學(xué)院上海高等研究院,;2.裕太微電子股份有限公司
摘要: 由于云計算、以太網(wǎng),、物聯(lián)網(wǎng)的廣泛運(yùn)用產(chǎn)生的數(shù)據(jù)爆炸式增長,大型數(shù)據(jù)中心網(wǎng)絡(luò)的有線輸入輸出(I/O)帶寬需求迅速增長,,高速以太網(wǎng)的發(fā)展順應(yīng)了網(wǎng)絡(luò)流量的快速增長趨勢,。而隨著以太網(wǎng)數(shù)據(jù)傳輸速率的提升,對串行鏈路的信號完整性挑戰(zhàn)性進(jìn)一步增大,。針對高速傳輸下以太網(wǎng)均衡技術(shù)面臨的挑戰(zhàn),,聚焦于各類均衡技術(shù),對各類均衡技術(shù)進(jìn)行深入分析,,探討各類均衡器的工作原理和特性以及闡述了這些均衡器在高速傳輸環(huán)境中的適用場景,,為未來高速以太網(wǎng)均衡器的發(fā)展和優(yōu)化提供了參考,以更好地滿足通信中不斷增長的對更高的傳輸效率和更低的誤碼率的需求,。
中圖分類號:TN913 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.245988
中文引用格式: 萬國偉,,康凱,蔣海平. 高速以太網(wǎng)均衡技術(shù)的綜述與思考[J]. 電子技術(shù)應(yīng)用,,2024,,50(12):41-47.
英文引用格式: Wan Guowei,Kang Kai,,Jiang Haiping. An overview and thinking of high-speed Ethernet equalization technology[J]. Application of Electronic Technique,,2024,50(12):41-47.
An overview and thinking of high-speed Ethernet equalization technology
Wan Guowei1,,Kang Kai1,,Jiang Haiping2
1.Shanghai Advanced Research Institute, Chinese Academy of Sciences,; 2.Motorcomm Electronic Technology Co.,, Ltd.
Abstract: With the explosive growth of data generated by the widespread use of cloud computing, Ethernet, and the Internet of Things (IoT), the demand for wired input/output (I/O) bandwidth in large data center networks has surged rapidly. The development of high-speed Ethernet aligns with the rapid growth of network traffic. However, as the data transmission rate of Ethernet increases, the challenges related to signal integrity in serial links are further amplified. This paper focuses on the challenges faced by Ethernet equalization technologies under high-speed transmission, analyzing various equalization techniques in depth. It explores the working principles and characteristics of different equalizers and discusses their applicability in high-speed transmission environments. The paper provides a reference for the future development and optimization of high-speed Ethernet equalizers, aiming to better meet the growing demand for higher transmission efficiency and lower bit error rates in communications.
Key words : high-speed Ethernet;high-speed wired serial links,;equalization technology

引言

在過去的十多年中,,數(shù)據(jù)中心中每個組件的有線輸入/輸出(I/O)通道數(shù)量和單通道數(shù)據(jù)速率都顯著增加,典型的大型以太網(wǎng)交換機(jī)集成電路的總帶寬大約每五年增長一個數(shù)量級。例如,,從2008年240 Gb/s(24個通道,,每通道速率為10 Gb/s)開始,到2019年接近25.6 Tb/s(256個通道,,每通道速率接近100 Gb/s),。這種帶寬需求的持續(xù)增長推動了現(xiàn)行56 Gb/s串行I/O標(biāo)準(zhǔn)的發(fā)展,并為未來超越100 Gb/s的鏈路奠定了基礎(chǔ),。數(shù)據(jù)量呈現(xiàn)出爆炸式增長,,這大大推動了大型數(shù)據(jù)中心網(wǎng)絡(luò)I/O帶寬需求的快速擴(kuò)展,高速以太網(wǎng)的發(fā)展順應(yīng)了網(wǎng)絡(luò)流量的快速增長趨勢。

高速以太網(wǎng)指的是傳輸速率超過傳統(tǒng)10 Mb/s的以太網(wǎng)技術(shù),,涵蓋了包括快速以太網(wǎng)(100 Mb/s),、千兆以太網(wǎng)(1 Gb/s)、10千兆以太網(wǎng),、25千兆以太網(wǎng),、40千兆以太網(wǎng)以及100千兆以太網(wǎng)在內(nèi)的多種標(biāo)準(zhǔn),以適應(yīng)當(dāng)下對大規(guī)模數(shù)據(jù)傳輸?shù)囊蟆6S著現(xiàn)代通信和計算需求的不斷增加,,傳統(tǒng)的并行傳輸方式在性能,、成本、功耗和可靠性上逐漸難以滿足需求,,SerDes(Serializer/Deserializer,,串行器/解串器)成為現(xiàn)代高速通信領(lǐng)域不可或缺的關(guān)鍵技術(shù)。它通過將并行數(shù)據(jù)轉(zhuǎn)換為高速串行數(shù)據(jù)進(jìn)行傳輸,,有效地解決了布線,、傳輸速率和功耗等方面的難題,并為以太網(wǎng),、光纖通信,、數(shù)據(jù)中心以及高速芯片間互連提供了可靠的解決方案。

在信號傳輸過程中,,存在許多非理想因素,,這些因素會破壞信號的完整性,例如頻率選擇性衰減,、趨膚效應(yīng),、介質(zhì)損耗、串?dāng)_,、反射,、抖動、噪聲等問題,。這些問題會對信號的接收和恢復(fù)造成不利影響,,嚴(yán)重時會導(dǎo)致誤碼,,影響傳輸質(zhì)量和性能表現(xiàn)。隨著高速數(shù)據(jù)通信的需求不斷提升,,信號完整性面臨的挑戰(zhàn)也日益嚴(yán)峻,。為了降低誤碼率、提高數(shù)據(jù)傳輸?shù)目煽啃?,目前的普遍做法是在串行鏈路的發(fā)送端和接收端使用各種均衡技術(shù)進(jìn)行補(bǔ)償和優(yōu)化,。這些均衡技術(shù)能夠有效地補(bǔ)償信號在傳輸過程中的損耗,消除干擾帶來的失真,,使得信號在復(fù)雜的傳輸環(huán)境中依然能夠保持較高的質(zhì)量和穩(wěn)定性,,確保系統(tǒng)的整體性能和傳輸效率。


本文詳細(xì)內(nèi)容請下載:

http://forexkbc.com/resource/share/2000006246


作者信息:

萬國偉1,,康凱1,,蔣海平2

(1.中國科學(xué)院上海高等研究院,上海 201210,;

2.裕太微電子股份有限公司,,上海 200000)


Magazine.Subscription.jpg

此內(nèi)容為AET網(wǎng)站原創(chuàng),,未經(jīng)授權(quán)禁止轉(zhuǎn)載,。