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一種多通道高速高精度PXIe數(shù)據(jù)采集模塊設(shè)計
信息技術(shù)與網(wǎng)絡(luò)安全
唐新懿1,,2,曹 平1,2,,解立坤1,2,,李 超1,,2,黃錫汝1,,2,,安 琪1,2
(1.中國科學(xué)技術(shù)大學(xué) 核探測與核電子學(xué)國家重點實驗室,,安徽 合肥230026,; 2.中國科學(xué)技術(shù)大學(xué) 近代物理系,安徽 合肥230026)
摘要: 介紹了一種基于放大器,、模數(shù)轉(zhuǎn)換(Analog to Digital Converter,,ADC)和現(xiàn)場可編程門陣列(Field Programmable Gate Array,F(xiàn)PGA)的多通道數(shù)據(jù)采集方案,,包括采集系統(tǒng)的主要構(gòu)成以及實現(xiàn)方法,,最后對系統(tǒng)性能進(jìn)行了測試。該電路模塊為子母板結(jié)構(gòu),,通過PCI Extensions for Instrumentation Express(PXIe)機箱背板總線實現(xiàn)數(shù)據(jù)的讀出能力,。該模塊可支持8個采集通道的同步采集,每通道采樣率可達(dá)500 MS/s,。測試結(jié)果表明,,在其帶寬內(nèi)有效位可接近11 bit(ADC采樣精度為14 bit),能夠滿足高速高精度的數(shù)據(jù)采集需求,。
中圖分類號: TM933.2
文獻(xiàn)標(biāo)識碼: A
DOI: 10.19358/j.issn.2096-5133.2021.04.009
引用格式: 唐新懿,,曹平,解立坤,,等. 一種多通道高速高精度PXIe數(shù)據(jù)采集模塊設(shè)計[J].信息技術(shù)與網(wǎng)絡(luò)安全,,2021,40(4):56-63.
Design of a multi-channel high-speed and high-precision PXIe data acquisition module
Tang Xinyi1,2,,Cao Ping1,,2,Xie Likun1,,2,,Li Chao1,2,,Huang Xiru1,,2,An Qi1,,2
(1.State Key Laboratory of Particle Detection and Electronics,,University of Science and Technology of China, Hefei 230026,,China,; 2.Department of Modern Physics,University of Science and Technology of China,,Hefei 230026,,China)
Abstract: The paper introduced a multi-channel data acquisition scheme based on amplifiers, Analog to Digital Converter(ADC) and Field Programmable Gate Array(FPGA), including the main components and implementation methods of the acquisition system. Finally, the system performance was tested. The circuit module is a mezzanine card structure, and the data readout ability is realized through the PCI Extensions for Instrumentation Express(PXIe) chassis backplane bus. The module can support simultaneous acquisition of 8 acquisition channels, and the sampling rate per channel can reach 500 MS/s. The results show that the Effective Number of Bits(ENOB) can be close to 11 bit in its bandwidth(ADC sampling accuracy is 14 bit), which can meet high-speed and high-precision data collection needs.
Key words : data acquisition;amplifier,;ADC,;FPGA;JESD204B

0 引言

數(shù)據(jù)采集技術(shù)是信息技術(shù)的重要內(nèi)容,,它研究數(shù)據(jù)的采集、存儲,、處理和控制問題[1]?,F(xiàn)如今,多通道數(shù)據(jù)采集系統(tǒng)已經(jīng)被廣泛應(yīng)用于諸如核物理,、高能物理,、航空航天、醫(yī)療衛(wèi)生,、通信等各個領(lǐng)域中,。隨著數(shù)據(jù)采集需求的日趨復(fù)雜[2],人們對采集系統(tǒng)性能指標(biāo)的要求也越來越高,,例如高采樣率,、高精度等[3]。IC工藝的飛速發(fā)展使得ADC芯片的性能不斷提升[4],,這讓數(shù)據(jù)采集系統(tǒng)同時具備高采樣率與高精度成為可能,。本文設(shè)計了一種基于FPGA的八通道、500 MS/s采樣率、14 bit采樣精度的數(shù)據(jù)采集模塊,,該模塊為標(biāo)準(zhǔn)的PXIe插卡模塊,,通過PXIe機箱背板總線以及機箱控制器與上位機進(jìn)行通信,最終實現(xiàn)了上位機與FPGA協(xié)同完成數(shù)據(jù)采集與性能測試,。



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作者信息:

唐新懿1,,2,曹  平1,,2,,解立坤1,2,,李  超1,,2,黃錫汝1,,2,,安  琪1,2

(1.中國科學(xué)技術(shù)大學(xué) 核探測與核電子學(xué)國家重點實驗室,,安徽 合肥230026,;

2.中國科學(xué)技術(shù)大學(xué) 近代物理系,安徽 合肥230026)


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