中圖分類號(hào)：TN401 文獻(xiàn)標(biāo)志碼：A DOI: 10.16157/j.issn.0258-7998.223077 中文引用格式： 王琪,，張梅娟,，鄧佳偉，等. 基于PCIE轉(zhuǎn)SATA多通道高速存儲(chǔ)電路設(shè)計(jì)與原型驗(yàn)證[J]. 電子技術(shù)應(yīng)用,，2023,，49(3)：72-76. 英文引用格式： Wang Qi，Zhang Meijuan,，Deng Jiawei,，et al. Design and prototype verification of multi-channel high-speed storage circuit base on PCIE to SATA[J]. Application of Electronic Technique，2023,，49(3)：72-76.
Design and prototype verification of multi-channel high-speed storage circuit base on PCIE to SATA
Wang Qi,，Zhang Meijuan，Deng Jiawei,，Yang Chuwei,，Zhou Qian
(China Electronics Technology Group Corporation No.58 Research Institute， Wuxi 214035,， China)
Abstract： Aiming at the problem that the traditional SATA controller has a single interface and cannot give full play to the performance of the SSD, a multi-channel high-speed storage circuit based on PCIE to SATA is designed. This design makes full use of the high-bandwidth and low-latency characteristics of the PCIE bus and follows the AHCI protocol, which can greatly reduce the useless seek times and data search time of the hard disk, and improve the read performance. At the same time, the design can support 4 SATA channels and has good scalability. This design combines the characteristics of PCIE and SATA protocols, introduces the system architecture of PCIE to SATA high-speed storage circuit, and elaborates the data stream transmission process based on AHCI protocol. Finally, the circuit is tested based on the FPGA prototype verification. The single-disk read and write rates of the circuit are 562MB/s and 527MB/s, respectively. Compared with the traditional SATA controller, the read and write performance is greatly improved. The test results show that the designed PCIE to SATA high-speed storage circuit has excellent read and write performance, and has good stability and scalability.
Key words : PCIE to SATA,；AHCI protocol；multi-channel,；FPGA verification
