《電子技術(shù)應(yīng)用》
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基于先進(jìn)工藝技術(shù)的機(jī)電控制SiP電路的設(shè)計與測試
電子技術(shù)應(yīng)用
許文運,,張明,,鄭利華
中國電子科技集團(tuán)公司第五十八研究所
摘要: 機(jī)電控制系統(tǒng)包含多款芯片,其小型化,、輕量化的需求日益迫切,,系統(tǒng)級封裝(System in Package)技術(shù)作為一種先進(jìn)封裝手段能夠?qū)⒍嗫畈煌愋偷男酒捎诟〉目臻g中,。基于系統(tǒng)級封裝技術(shù),,并結(jié)合TSV與FanOUT技術(shù)設(shè)計了一款機(jī)電控制SiP電路,,該電路包括頂層DSP信號控制單元和底層FPGA信號處理單元,兩者通過PoP(Package on Package)形式堆疊構(gòu)成SiP電路,,相比于常規(guī)分立器件所搭建的機(jī)電控制系統(tǒng),,該SiP體積縮小70%以上,重量減輕80%以上,。針對該款SiP電路設(shè)計了相應(yīng)的測試系統(tǒng),,且對內(nèi)部的ADC及DAC等芯片提出了一種回環(huán)測試的方法,能夠提高測試效率,。測試結(jié)果表明,,該電路滿足設(shè)計要求,在機(jī)電控制領(lǐng)域具有一定的應(yīng)用前景,。
中圖分類號:TN454 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.245167
中文引用格式: 許文運,,張明,鄭利華. 基于先進(jìn)工藝技術(shù)的機(jī)電控制SiP電路的設(shè)計與測試[J]. 電子技術(shù)應(yīng)用,,2024,,50(11):105-108.
英文引用格式: Xu Wenyun,Zhang Ming,,Zheng Lihua. Design and test of SiP circuit of electromechanical control based on advanced technology[J]. Application of Electronic Technique,,2024,50(11):105-108.
Design and test of SiP circuit of electromechanical control based on advanced technology
Xu Wenyun,,Zhang Ming,,Zheng Lihua
No.58 Research Institute, China Electronics Technology Group Corporation
Abstract: Electromechanical control system contains many kinds of chips, and its miniaturization and lightweight demand is increasingly urgent. As an advanced packaging method, system level packaging (System in Package)technology can integrate many different types of chips in a smaller space. In this paper, a SiP circuit of electromechanical control is designed based on system-level packaging technology, combined with TSV and FanOUT technology. The circuit includes the DSP signal control unit and the bottom FPGA signal processing unit, which are stacked in the form of PoP to form a SiP circuit. Compared with the electromechanical control system built by conventional discrete devices, the SiP volume is reduced by more than 70% and the weight is reduced by more than 80%. A test system is designed for SiP circuit, and a loopback test method is proposed for ADC and DAC chips, which can improve the test efficiency. The results show that the circuit meets the design requirements and has a certain application prospect in the field of electromechanical control.
Key words : electromechanical control,;system level packaging,;package on package;high integrate

引言

機(jī)電控制領(lǐng)域非常寬泛,,包括傳統(tǒng)的AC/DC電機(jī)控制,,以及現(xiàn)代的伺服電機(jī)控制、步進(jìn)電機(jī)控制等,。應(yīng)用場景有工業(yè)機(jī)器人,、數(shù)控機(jī)床,、自動化生產(chǎn)線等,其核心技術(shù)是各類電機(jī)的速度調(diào)節(jié)和精確定位控制,。傳統(tǒng)的機(jī)電控制系統(tǒng)一般是將DSP、FPGA,、ADC,、DAC和EEPROM等分立的元器件安裝在PCB上,這種形式的控制系統(tǒng)體積較大,,在對空間有要求的情況下存在一定限制,。

隨著集成電路封裝技術(shù)發(fā)展,SiP采用多芯片單封裝可以大幅度降低電路占用面積,,提高系統(tǒng)可靠性,,并降低成本[1-4]。常規(guī)的SiP方案一般采用基板形式,,將不同芯片平鋪在塑封或陶瓷基板上,,在基板上實現(xiàn)走線互聯(lián),再將需要的信號和電源進(jìn)行扇出[5-12],。受基板加工工藝限制和封裝工藝限制,,基板尺寸過大會產(chǎn)生翹曲,故集成芯片數(shù)量有限,。為此,,本文設(shè)計了一種基于TSV和FanOUT技術(shù)的機(jī)電控制SiP電路,采用上下兩層堆疊的方式,,在同等面積上可集成2倍數(shù)量的芯片,,能夠有效地解決上述問題。


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作者信息:

許文運,,張明,,鄭利華

(中國電子科技集團(tuán)公司第五十八研究所,江蘇 無錫 214026)


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