一種基于知識(shí)蒸餾的量化卷積神經(jīng)網(wǎng)絡(luò)FPGA部署
電子技術(shù)應(yīng)用
羅德宇,,郭千禧,,張懷誠,黃啟俊,,王豪
武漢大學(xué) 物理科學(xué)與技術(shù)學(xué)院
摘要: 設(shè)計(jì)了一種針對心電數(shù)據(jù)實(shí)時(shí)分類的量化神經(jīng)網(wǎng)絡(luò),將權(quán)重量化為兩位整數(shù),,運(yùn)用知識(shí)蒸餾的方法使性能達(dá)到了期望的效果,,并部署于FPGA開發(fā)板上。知識(shí)蒸餾后的量化網(wǎng)絡(luò)比全精度網(wǎng)絡(luò)的分類準(zhǔn)確率提升了9%,。在FPGA開發(fā)板上的運(yùn)行結(jié)果符合預(yù)期,,達(dá)到了需要的性能,可以對左束支傳導(dǎo)阻滯(L),、右束支傳導(dǎo)阻滯(R),、正常心拍(N)和室性早搏綜合征(V)四種心電信號(hào)進(jìn)行分類,相比于其他量化方式對存儲(chǔ)參數(shù)的需求更小,,資源使用更少,,相比于CPU速度提升了1.5倍,運(yùn)行時(shí)間達(dá)到實(shí)時(shí)性要求,,適合于部署在小型,、輕量化的資源有限的可穿戴設(shè)備上。
中圖分類號(hào):TN911.72 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.234479
中文引用格式: 羅德宇,,郭千禧,,張懷誠,等. 一種基于知識(shí)蒸餾的量化卷積神經(jīng)網(wǎng)絡(luò)FPGA部署[J]. 電子技術(shù)應(yīng)用,,2024,,50(4):97-101.
英文引用格式: Luo Deyu,Guo Qianxi,,Zhang Huaicheng,,et al. An FPGA implement of ECG classifier using quantized CNN based on knowledge distillation[J]. Application of Electronic Technique,2024,50(4):97-101.
中文引用格式: 羅德宇,,郭千禧,,張懷誠,等. 一種基于知識(shí)蒸餾的量化卷積神經(jīng)網(wǎng)絡(luò)FPGA部署[J]. 電子技術(shù)應(yīng)用,,2024,,50(4):97-101.
英文引用格式: Luo Deyu,Guo Qianxi,,Zhang Huaicheng,,et al. An FPGA implement of ECG classifier using quantized CNN based on knowledge distillation[J]. Application of Electronic Technique,2024,50(4):97-101.
An FPGA implement of ECG classifier using quantized CNN based on knowledge distillation
Luo Deyu,,Guo Qianxi,,Zhang Huaicheng,Huang Qijun,,Wang Hao
School of Physics and Technology,, Wuhan University
Abstract: In this paper, we designed a quantized convolutional neural network for real-time classification of ECG data, quantized the weights to INT2, applied knowledge distillation to achieve the desired classification results, and deployed it on FPGA. The quantized network after knowledge distillation improved the classification accuracy by 9% over the full precision network. The running results on the FPGA meet the expectations and achieve the required performance to classify four types of ECG signals, left bundle branch conduction block (L), right bundle branch conduction block (R), normal beat (N) and ventricular premature beat syndrome (V), which requires less storage parameter requirements and less resource usage than other quantization methods, and improves the computational speed of the CPU compared to the CPU by 1.5 times, the running time meets the real-time requirement, and is suitable for deployment on small, lightweight wearable devices with limited resources.
Key words : ECG signal;quantized CNN,;knowledge distillation,;FPGA
引言
我國心血管病(Cardiovascular Disease,CVD)發(fā)病率和死亡率仍在升高,,在我國城鄉(xiāng)居民疾病死亡構(gòu)成比中,,CVD占首位[1]。提前預(yù)防和診斷CVD是目前很重要的醫(yī)療問題,。24 h動(dòng)態(tài)心電圖可以在較長時(shí)間內(nèi)對人體心臟安靜和活動(dòng)狀態(tài)下的心電圖變化情況進(jìn)行記錄,、編集和分析,進(jìn)而了解心電圖的變化情況,,可以作為CVD診斷的重要依據(jù)[2],。在心電信號(hào)自動(dòng)識(shí)別的領(lǐng)域,神經(jīng)網(wǎng)絡(luò)算法常常被用來作為分析的算法,,這種分析算法常常采用的是一維的ECG信號(hào)[3],。而在算法中使用被轉(zhuǎn)為二維的ECG信號(hào)時(shí),更多的信息量給量化算法提供了更好的條件,,也更適合于硬件實(shí)現(xiàn)[4],。本文設(shè)計(jì)了一種針對心電數(shù)據(jù)實(shí)時(shí)分類的量化神經(jīng)網(wǎng)絡(luò),并部署于FPGA上,,驗(yàn)證了效果,。該硬件化模塊具有小型化、準(zhǔn)確率高,、計(jì)算速度快等特點(diǎn),,適合于部署在便攜式心電監(jiān)測設(shè)備上。
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作者信息:
羅德宇,,郭千禧,,張懷誠,黃啟俊,,王豪
(武漢大學(xué) 物理科學(xué)與技術(shù)學(xué)院,,湖北 武漢 430072)
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