改進(jìn)LCR儀表測(cè)量穩(wěn)定性的相位裕度優(yōu)化方法及硬件實(shí)現(xiàn)
電子技術(shù)應(yīng)用
楊學(xué)文,,陳靈強(qiáng),,馬凱元
河北工程大學(xué) 信息與電氣工程學(xué)院
摘要: 為解決LCR表在測(cè)量容性阻抗時(shí)的自激問(wèn)題,,設(shè)計(jì)了一種增強(qiáng)測(cè)量穩(wěn)定性的LCR儀表。通過(guò)分析測(cè)量前端自平衡電橋電路的相位裕度,,采用相位補(bǔ)償電路解決因相位滯后造成的自激問(wèn)題,。應(yīng)用直接數(shù)字頻率合成技術(shù)結(jié)合相位校準(zhǔn)電路設(shè)計(jì),產(chǎn)生相位準(zhǔn)確的正交測(cè)量信號(hào),。使用開(kāi)關(guān)鑒相式鎖相放大器處理微弱信號(hào),,經(jīng)16位模數(shù)轉(zhuǎn)換器采集后輸入到微處理器進(jìn)行矢量信號(hào)合成與輸出顯示。相比專(zhuān)業(yè)儀器,,所設(shè)計(jì)樣機(jī)對(duì)電阻測(cè)量相對(duì)誤差可達(dá)0.5%,,對(duì)大電容測(cè)量相對(duì)誤差可達(dá)1%。
中圖分類(lèi)號(hào):TN98 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.245400
中文引用格式: 楊學(xué)文,,陳靈強(qiáng),,馬凱元. 改進(jìn)LCR儀表測(cè)量穩(wěn)定性的相位裕度優(yōu)化方法及硬件實(shí)現(xiàn)[J]. 電子技術(shù)應(yīng)用,2024,,50(12):70-76.
英文引用格式: Yang Xuewen,,Chen Lingqiang,Ma Kaiyuan. Phase margin optimization method and hardware realization to improve the measuring stability of LCR instrument[J]. Application of Electronic Technique,,2024,,50(12):70-76.
中文引用格式: 楊學(xué)文,,陳靈強(qiáng),,馬凱元. 改進(jìn)LCR儀表測(cè)量穩(wěn)定性的相位裕度優(yōu)化方法及硬件實(shí)現(xiàn)[J]. 電子技術(shù)應(yīng)用,2024,,50(12):70-76.
英文引用格式: Yang Xuewen,,Chen Lingqiang,Ma Kaiyuan. Phase margin optimization method and hardware realization to improve the measuring stability of LCR instrument[J]. Application of Electronic Technique,,2024,,50(12):70-76.
Phase margin optimization method and hardware realization to improve the measuring stability of LCR instrument
Yang Xuewen,Chen Lingqiang,,Ma Kaiyuan
School of Information and Electrical Engineering,, Hebei University of Engineering
Abstract: To address the self-excitation issue in the measurement of capacitive impedance using LCR meters, an LCR instrument has been developed to enhance measurement stability. By analyzing the phase margin of the self-balancing bridge circuit at the measurement front-end, a phase compensation circuit has been employed to resolve the self-excitation problem caused by phase lag. Utilizing direct digital frequency synthesis combined with a phase calibration circuit design, quadrature measurement signals of accurate phase are generated. A switch-phase discriminator lock-in amplifier is used to process weak signals, which are sampled by a 16-bit analog-to-digital converter and input into the microprocessor for vector signal synthesis and output display. Compared to professional instruments, the prototype designed has achieved a relative error of up to 0.5% for resistance measurements and up to 1% for large capacitance measurements.
Key words : self-balancing bridge;phase margin,;direct digital frequency synthesis,;phase-locked amplifier
引言
測(cè)量阻抗有許多方法[1-3],有電橋法,、諧振法,、自平衡法、網(wǎng)絡(luò)分析法等,,常見(jiàn)的LCR表多使用自平衡法進(jìn)行阻抗測(cè)量,,該法基于自平衡電橋電路,適合直流至幾兆赫茲的低頻段測(cè)量,。
本文基于自平衡法設(shè)計(jì)了可以增強(qiáng)容性器件測(cè)量穩(wěn)定性的LCR儀表,。通過(guò)分析前端輸入電路的相位裕度,使用相位補(bǔ)償電路解決了測(cè)量高容性器件時(shí)引起的自平衡電路自激問(wèn)題,。使用鎖相放大技術(shù)和直接數(shù)字頻率合成技術(shù)提高測(cè)量精度,。實(shí)驗(yàn)表明所設(shè)計(jì)樣機(jī)與專(zhuān)業(yè)儀器測(cè)量結(jié)果較匹配,且在高容性輸入時(shí)可保持穩(wěn)定測(cè)量,。
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作者信息:
楊學(xué)文,,陳靈強(qiáng),馬凱元
(河北工程大學(xué) 信息與電氣工程學(xué)院,,河北 邯鄲 056038)
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