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嵌入式實(shí)時(shí)控制系統(tǒng)硬件可靠性及應(yīng)用研究
來源:電子技術(shù)應(yīng)用2012年第5期
郭榮佐1,,黃 君2
1.四川師范大學(xué) 計(jì)算機(jī)科學(xué)學(xué)院,,四川 成都610068; 2.四川工商職業(yè)技術(shù)學(xué)院 基礎(chǔ)教學(xué)部,四川 都江堰611830
摘要: 嵌入式實(shí)時(shí)控制系統(tǒng)硬件故障是造成系統(tǒng)失效的主要原因之一,針對(duì)此問題,首先定義嵌入式實(shí)時(shí)控制系統(tǒng)硬件體系結(jié)構(gòu),;然后分析嵌入式實(shí)時(shí)控制系統(tǒng)的可用性和失效模式,并對(duì)單個(gè)IP硬核和嵌入式實(shí)時(shí)控制系統(tǒng)硬件應(yīng)用Markov鏈建立了可靠性模型,;最后用所建立的模型,,對(duì)嵌入式聯(lián)鎖控制器硬件進(jìn)行了可靠度計(jì)算和分析。通過計(jì)算可知,,所建立的可靠性模型能夠描述嵌入式實(shí)時(shí)控制系統(tǒng)硬件的狀態(tài)變遷,,并能定量預(yù)測(cè)和分析其可靠度,模型具有一定的實(shí)用價(jià)值,。
中圖分類號(hào): TP302.7,,TP202+.1
文獻(xiàn)標(biāo)識(shí)碼: A
文章編號(hào): 0258-7998(2012)05-0011-04
Reliability & application research of the hardware of embedded real-time control system
Guo Rongzuo1,Huang Jun2
1.Collage of Computer Science,,Sichuan Normal University, Chengdu 610068,,China; 2.Department of Grounding Instruction,,Sichuan Technology & Business College, Dujiangyan 611830,,China
Abstract: According to embedded real-time control system hardware malfunction caused system failure is one of the main which mainly caused by the hardware design flaws. Firstly, this paper define the hardware system structure of the embedded real-time control system. And then, analyze availability and failure mode of the embedded real-time control system, and establish reliability model of single IP hardcore and embedded real-time control system hardware used Markov chain. Finally, calculate and analyze reliability of the embedded controller hardware interlocking application of the model. The results show that the reliability of the development of this model can describe the embedded real-time control system hardware state change, and can be used to forecast and analysis their reliability. Therefore, the research is feasible of this paper, the model has certain practical value.
Key words : hardware,;reliability;real-time system,;Markov chain,;inter-locking

    嵌入式實(shí)時(shí)控制系統(tǒng)是指在系統(tǒng)規(guī)定的時(shí)間間隔內(nèi),調(diào)節(jié)或強(qiáng)制被控制對(duì)象完成預(yù)定動(dòng)作或做出及時(shí)響應(yīng),;能對(duì)輸入做出快速響應(yīng),、快速檢測(cè)和快速處理;并能實(shí)時(shí)提供現(xiàn)場(chǎng)驅(qū)動(dòng)操作信號(hào),,以實(shí)現(xiàn)對(duì)被控對(duì)象控制的系統(tǒng),。嵌入式實(shí)時(shí)控制系統(tǒng)軟件方面的不可靠情況較少,而硬件故障時(shí)有發(fā)生,。

    在硬件可靠性方面,,已有學(xué)者都進(jìn)行了相關(guān)研究:Bobbio等人[1]對(duì)單部件Markov模型進(jìn)行了可靠性分析;Kuo和Zuo[2]對(duì)n取k表決系統(tǒng)進(jìn)行了可靠性模型總結(jié),,并提出了優(yōu)化策略;Arulmozhi[3]對(duì)異構(gòu)部件組成的k/n表決系統(tǒng)提出了一種簡(jiǎn)單而有效的計(jì)算模型,;Sherwin和Bossche[4]對(duì)備用系統(tǒng)進(jìn)行了可靠性研究與分析,;Pukite[5]對(duì)一些常見的硬件結(jié)構(gòu)進(jìn)行了Markov建模,同時(shí)對(duì)這些硬件結(jié)構(gòu)的可靠性進(jìn)行了歸納總結(jié),;梅登華等[6]人對(duì)鐵路信號(hào)控制系統(tǒng)的硬件可靠性進(jìn)行了研究,。這些研究對(duì)提高計(jì)算機(jī)系統(tǒng)的可靠性具有十分重要的意義,但對(duì)嵌入式實(shí)時(shí)控制系統(tǒng)硬件可靠性來說,,還需要對(duì)其進(jìn)行深入細(xì)致的研究,。
1 ERCS目標(biāo)定義
    在對(duì)嵌入式實(shí)時(shí)控制系統(tǒng)ERCS(Embedded Real-time Control System)硬件可靠性進(jìn)行研究之前,需先定義其硬件構(gòu)成,。任何ERCS的硬件都由EDU和IP硬核組成,。IP硬核由電子元器件EC(Electronic Components)、電路及其結(jié)構(gòu)CiS(Circuit and its Structure),、電路板CB(Circuit Board)和執(zhí)行裝置ED(Executive Device)等組成,。
    ERCS硬件組成的每個(gè)部分,都具有一定的約束,,即:電子元器件IEC1不超過N1,、可選電路及其結(jié)構(gòu)ICiS2不能超過N2,……,、電路板布線方式ICBn不能超過Nn-1,、執(zhí)行裝置可選種類或可選裝置不超過Nn;而某種功能的可選硬件有多種,,這些可選的硬件具有不同的可靠性參數(shù)[7],。
 
   

 

3 算例分析
    參考文獻(xiàn)[16]設(shè)計(jì)了嵌入式車站信號(hào)聯(lián)鎖控制器,,應(yīng)用本文的ERCS硬件可靠性模型對(duì)其進(jìn)行可靠性分析。
3.1 控制器硬件的可靠性
    嵌入式聯(lián)鎖控制器采用冗余結(jié)構(gòu),,單控制器硬件包括MCU,、通信模塊和外圍接口等,具體硬件設(shè)計(jì)可參見參考文獻(xiàn)[16],。對(duì)嵌入式聯(lián)鎖控制器的單個(gè)MCU的各個(gè)組成模塊進(jìn)行分析,,得到如圖4所示的基本任務(wù)可靠性框圖[17]。
3.2 各IP硬核可靠度
    依據(jù)本文模型,,以圖5所示的嵌入式聯(lián)鎖控制器的電源電路為例,,查閱各組成電路的手冊(cè),得到如表1所示的各種芯片及器件的失效率,。


 


    本文針對(duì)ERCS硬件進(jìn)行了可靠性建模與分析,,并結(jié)合具體實(shí)例,通過對(duì)嵌入式聯(lián)鎖控制器硬件采用本文的可靠性模型進(jìn)行可量化計(jì)算可知,,該模型適合實(shí)時(shí)控制系統(tǒng)的可靠性設(shè)計(jì)要求,,能夠?qū)RCS硬件可靠性進(jìn)行量化計(jì)算;同時(shí),,該模型適合對(duì)ERCS硬件可靠性進(jìn)行分配與計(jì)算,,具有可接受性、普遍性和數(shù)據(jù)真實(shí)性,,符合IEC61165標(biāo)準(zhǔn),。
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