中圖分類號： TN402
文獻(xiàn)標(biāo)識碼： A
DOI：10.16157/j.issn.0258-7998.201022
中文引用格式： 李姝萱，卜剛. 基于FPGA的PIE編碼與UVM驗證平臺的設(shè)計[J].電子技術(shù)應(yīng)用,，2021,，47(6)：110-114.
英文引用格式： Li Shuxuan，Bu Gang. Design of PIE coding based on FPGA and UVM verification platform[J]. Application of Electronic Technique,，2021,，47(6)：110-114.

Design of PIE coding based on FPGA and UVM verification platform

Abstract： The international standard ISO/IEC18000-6 stipulates pulse interval encoding(PIE) as the encoding method of the reader transmission link in the RFID digital baseband system. It uses Verilog language to design the module,， synthesizes with Quartus II software and downloads it to FPGA development board, then use SignalTap II logic analyzer to collect and analyzethe signal. In addition, the UART transceiver module is added on the basis of the design to realize the communication between PC and FPGA board. In order to fully verify the PIE code, based on UVM verification methodology and direct programminginterface C(DPI-C), an efficient and reusable verification platform was designed and implemented. The driver and the monitor were implemented to send excitation and the function of collecting output results. The output results of the reference model and DUT are consistent in the scoreboard, and the function coverage reaches 100%, which improves efficiency and completeness of the verification.

Key words : PIE coding,；UART,；universal verification methodology；directed program interface