中圖分類號：TN402
文獻標志碼：A
DOI:10.16157/j.issn.0258-7998.222892
中文引用格式： 沈婧,，陶青平，強小燕. 基于EMIF總線接口的橋芯片設計[J]. 電子技術應用,，2023,，49(1)：36-40.
英文引用格式： Shen Jing，Tao Qingping,，Qiang Xiaoyan. Design of bridge chip based on EMIF bus interface[J]. Application of Electronic Technique,，2023，49(1)：36-40.

Design of bridge chip based on EMIF bus interface

Abstract： EMIF is an external storage interface on a DSP (digital signal processor) device, and this paper proposes a bridge chip design method based on the EMIF interface of the TMS320VC5510 circuit. The bridge chip contains low-speed peripherals I2C, UART and SDIO interface, while integrating IDO, ADC analog IP. This design has been fully EDA simulation and FPGA verification, and tapeout for silicon verification. The implementation test results show that the EMIF interface can communicate with the bridge chip without error, and realize the peripheral expansion function of the TMS320VC5510 circuit. The design method of this bridge chip greatly increases the flexibility of SoC design on the market, effectively reduces the design cycle, and saves design costs.

Key words : EMIF,；DSP；bridge chip,；silicon verification,；SoC design