School of Software,, Shanghai Jiao Tong University,, Shanghai 200240, China
Abstract: The Wafer Level Chip Scale Packaging (WLCSP) of chips on 12-inch wafers without dicing poses significant technological challenges for automatic optical inspection (AOI) in terms of high-quality imaging and imaging speed. To achieve high-quality and high-speed registration of the image sequence, a local image sequence generated by multiple scans needs to be stitched together to form a global image of the wafer. To this end, a phase correlation method based on the four-neighborhood checkerboard registration is implemented using OpenCL in an FPGA to address the challenge. Initially, a two-dimensional Fast Fourier Transform (FFT) and cross-power spectrum function kernel are constructed. Then, dual-port and row-buffered device global memory are employed to reuse the computed spectral data and to apply kernel channel cascading to enhance the registration speed. Finally, the registration result is optimized using a minimum spanning tree algorithm to reduce the cumulative error of global image coordinate calculation. The proposed registration algorithm and its accelerated performance are verified using actual scanned images.
Key words : wafer level chip scale package,;image registration,;FPGA;OpenCL