《電子技術(shù)應(yīng)用》
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基于ADS的微系統(tǒng)電源完整性仿真及優(yōu)化
電子技術(shù)應(yīng)用
呂超華1,,李慶忠1,,時(shí)廣軼2
1.江南大學(xué) 機(jī)械工程學(xué)院;2.無錫北微傳感科技有限公司
摘要: 隨著芯片制造技術(shù)和封裝技術(shù)的發(fā)展,,電子產(chǎn)品內(nèi)部的器件集成度和信號速度在持續(xù)提高,,微系統(tǒng)成為一種新興的形式,,這導(dǎo)致了對電源完整性的要求不斷提高。不合理的電源完整性設(shè)計(jì)將會給電源質(zhì)量和信號質(zhì)量帶來極大的干擾,,甚至?xí)瓜到y(tǒng)崩潰,。針對所設(shè)計(jì)的多芯片微系統(tǒng)設(shè)計(jì)進(jìn)行了電源完整性的仿真,并利用基板,、PCB去耦電容網(wǎng)絡(luò)協(xié)同去耦的方式對電源分配網(wǎng)絡(luò)阻抗進(jìn)行了優(yōu)化,,解決了微系統(tǒng)內(nèi)部的空間有限與去耦電容需求量大的矛盾,保證了微系統(tǒng)的電源完整性,。
中圖分類號:TN402 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.234131
中文引用格式: 呂超華,,李慶忠,時(shí)廣軼. 基于ADS的微系統(tǒng)電源完整性仿真及優(yōu)化[J]. 電子技術(shù)應(yīng)用,,2024,,50(5):7-12.
英文引用格式: Lv Chaohua,Li Qingzhong,,Shi Guangyi. PI simulation and optimization of microsystem based on ADS[J]. Application of Electronic Technique,,2024,50(5):7-12.
PI simulation and optimization of microsystem based on ADS
Lv Chaohua1,,Li Qingzhong1,,Shi Guangyi2
1.School of Mechanical Engineering, Jiangnan University,; 2.Wuxi Beiwei Sensing Technology Co.,, Ltd.
Abstract: With the development of chip manufacturing technology and packaging technology, the device integration and signal speed inside electronic products continue to increase, and microsystems become an emerging form, which leads to increasing requirements for power integrity. Unreasonable power supply integrity design will bring great interference to power quality and signal quality, and even make the system collapse. In this paper, the power supply integrity of the designed multi-chip microsystem was simulated, and the PDN impedance was optimized by the collaborative decoupling of substrate and PCB decoupling capacitor network, which solved the contradiction between the limited space inside the microsystem and the large demand for decoupling capacitor, and ensured the power supply integrity of the microsystem.
Key words : PI;PDN,;impedance,;decoupling capacitor

引言

信息產(chǎn)業(yè)是推動工業(yè)發(fā)展的重要產(chǎn)業(yè)之一,隨著電子產(chǎn)業(yè)的不斷發(fā)展,,對電子產(chǎn)品體積,、響應(yīng)速度等性能的要求日益提高。近幾年,,新型的封裝結(jié)構(gòu)和封裝工藝層出不窮,、芯片的制造技術(shù)不斷進(jìn)步以及封裝內(nèi)部集成度增大的趨勢,使得微系統(tǒng)成為了一種新興的產(chǎn)品形式,。同時(shí),,微系統(tǒng)的發(fā)展同樣具備了信號頻率提高、器件集成度增大、工作電流升高和工作電壓降低等趨勢,,這些趨勢都對電源完整性(Power Integrity, PI)的設(shè)計(jì)提出了更高的要求[1-7] ,。電源分配網(wǎng)絡(luò)(Power Delivery Network, PDN)阻抗仿真和優(yōu)化是電源完整性設(shè)計(jì)的重要內(nèi)容,并在基板或PCB的設(shè)計(jì)中起到了越來越重要的作用,。


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作者信息:

呂超華1,,李慶忠1,時(shí)廣軼2

(1.江南大學(xué) 機(jī)械工程學(xué)院,,江蘇 無錫 214122,;2.無錫北微傳感科技有限公司,江蘇 無錫214072)


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